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    my 4 bits on FPGA


    The subtle art of tricking rocks into thinking
    • 7400 FPGA diary 2 - Transistor Level Simulation of my FPGA in VHDL

      includes tricks to coerce VHDL to behave like Verilog's tranif1

      Posted on 2023-12-11

      Fig 1: Schematics of the simulated crosspoint switch with individual enable signals for each inout port. [Read More]
      Tags:
      • diy-fpga
      • vhdl
    • 7400 FPGA diary 1 - Configurable Logic Slice

      How to design the insides of an FPGA

      Posted on 2023-12-08

      Fig 1: The CLB from concept to PCB. [Read More]
      Tags:
      • diy-fpga
    • 7400 FPGA diary 0 - Architecture Concept

      How to design the insides of an FPGA

      Posted on 2023-12-08

      Fig 1: One modular architecture tile consisting of a CLB, a SW box and two C-Boxes. [Read More]
      Tags:
      • diy-fpga
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    Simon Burkhardt  •  2025  •  simonmartin.ch

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